(a) Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and, more particularly, to an LCD device having a smaller level difference on the surface of an active-matrix substrate and capable of preventing attachment of dust onto the surface of the active-matrix substrate.
(b) Description of the Related Art
LCD devices have been increasingly used as flat-panel display devices in, for example, computer systems and television sets. Among other LCD devices, an active-matrix mode LCD (AM-LCD) device has advantages of higher-speed response and suited to incorporation of a larger number of pixels, improvement of image quality, increase of panel size and improvement of color quality.
FIG. 3 depicts the schematic configuration of a typical (conventional) AM-LCD device in a top plan view, wherein a TFT substrate (active-matrix substrate) 11 and a counter substrate 12 sandwich therebetween a liquid crystal (LC) layer. The TFT substrate 11 mounts thereon a plurality of signal lines 13 extending parallel to one another, and a plurality of scanning lines 14 extending perpendicular to the signal lines 13. A plurality of pixel electrodes 17 each associated with a TFT (thin film transistor) 18 are disposed in a matrix at the intersections between the signal lines 13 and the scanning lines 14.
At the ends of the signal lines 13, there are provided respective signal terminals 16, whereas there are provided scanning terminals 15 at the ends of the respective scanning lines 14. The signal terminals 16 and the scanning terminals 15 are used for electrical connection to terminals of a flexible wiring board and bumps of a driving circuit, and electrical contact with signal pins of a probe card used for delivery of test driving signals during a product test. The counter substrate 12 mounts thereon a common electrode, color filters and an orientation film, which are not specifically depicted in the drawing. In an alternative, the common electrode may be provided on the TFT substrate.
FIGS. 4A to 4F consecutively show steps of a fabrication process for manufacturing the TFT substrate in the LCD device of FIG. 3, wherein the areas for the scanning terminals, signal terminals, scanning lines, signal lines and pixel electrodes are separately depicted, as specified so in the drawing. A first metallic film is formed on a transparent substrate, such as made of glass, and subjected to patterning to form the scanning lines 22 and first metallic film patterns 23 of the scanning terminals (FIG. 4A), followed by depositing a first dielectric film 24 over the entire area (FIG. 4B).
Subsequently, the first dielectric film 24 is subjected to patterning to form first via holes 41 exposing therefrom the first metallic film patterns 23 of the scanning terminals 23. A second metallic film is then deposited and subjected to patterning to form the signal lines 25, signal terminals 26, and second metallic film patterns 42 of the scanning terminals (FIG. 4C), followed by depositing thereon a second dielectric film 27 over the entire area (FIG. 4D). Thereafter, second via holes 28 and 29 are formed in the second dielectric film 27 to expose therethrough the signal terminals 26 and the second metallic film patterns 42 of the scanning terminals (FIG. 4E).
A transparent conductive film is then deposited thereon over the entire area, followed by patterning thereof to form transparent pixel electrodes 30 as well as transparent terminals 31 and 32 on the second metallic film patterns 42 of the scanning terminals and the signal terminals 26 (FIG. 4F). Thereafter, an orientation film is formed on the display area and subjected to a rubbing treatment to form scratches thereon aligned in one direction. The scratches on the orientation film have a function of aligning the axes of LC molecules in the LC layer in a specified initial direction. It is to be noted that the process for forming the TFTs is omitted herein for description, taken in consideration that the TFTs are not important elements in the feature of the present invention and may be formed using a conventional technique.
FIG. 5 schematically shows the rubbing treatment for the orientation film. The rubbing treatment is such that a rubbing roller 51 attached with a brush (or rubbing cloth) 55 is guided to slide on the orientation film 43 formed on the substrate 52, wherein the rubbing roller 51 is rotated to thereby form scratches extending in one direction on the surface of the orientation film 43. The rubbing roller 51 rotates in a counter-clockwise direction, the substrate 52 moves toward the left in the drawing, and thus the rubbing treatment is conducted in the direction of arrow RD, i.e., from the left to the right of the substrate 52 in the drawing.
The rubbing treatment generates file dust (or swarfs) from the orientation film 43 and fabric dust (or flocks) from the bristles of the rubbing cloth 55. The rubbing treatment conducted on a plurality of substrates in a single continuous step causes the file dust and fabric dust to be carried from the substrate at which the dust is generated toward the subsequent substrates. The dust thus carried is attached onto the substrates, especially in the surface area of the substrate 52 having a level difference, such as formed at the periphery of a depression or via hole.
FIG. 6 shows an example of the dust attached onto the level differences on the surface of a substrate 52. The rotational direction of the rubbing roller 51 and the direction of the movement of the substrate 52 generally causes the dust 54 to be attached onto the steps of a depression 53, such as a leading step “A” and a trailing step “B”, as viewed in the direction RD of the rubbing treatment, of the depression 53 as shown in FIG. 6. It is to be noted that the amount of dust 54 attached onto the trailing step “B” of the depression 53 is smaller than the amount of dust 54 attached onto the leading step “A”, because the dust 54 attached onto the trailing step “B” is more likely to be removed by the bristles of the rubbing cloth 55 compared to the dust 54 attached onto the leading step “A”. This means a smaller level difference should be formed more preferably at the leading step “A” compared to the trailing step “B” to efficiently reduce the amount of dust captured on the level differences.
FIG. 7A shows a conventional structure of the vicinity of a scanning terminal formed on the substrate in a top plan view, and FIG. 7B shows the scanning terminal in a sectional view taken along line A–A′ in FIG. 7A. The layer structure of the scanning terminal and the vicinity thereof includes a first metallic film pattern 1 (23 in FIG. 4F), first dielectric film 6 (24 in FIG. 4F), second metallic film pattern 2 (42 in FIG. 4F), second dielectric film 7 (27 in FIG. 4F) and ITO film pattern 3 (31 in FIG. 4F), which are consecutively deposited on the substrate 10 (21 in FIG. 4F). The first dielectric film 6 and second dielectric film 7 have therein first via hole 4 and second via hole 5, respectively, for allowing electric connection between the first metallic film pattern 1 and the second metallic film pattern 2 and between the second metallic film pattern 2 and the ITO film pattern 3, respectively. In FIG. 7A, the order of arrangement as viewed from outside the terminal is such that the edge of the ITO film pattern 3, the edge of the first metallic film pattern 1, the edge of the second metallic film pattern 2, the periphery (inner wall) of the first via hole 4 and the periphery of the second via hole 5 are consecutively arranged.
FIGS. 8A and 8B show the structure of the vicinity of another conventional terminal, similarly to FIGS. 7A and 7B, respectively. The layer structure of the terminal and the vicinity thereof includes the first metallic film pattern 1, first dielectric film 6, second metallic film pattern 7 and ITO film pattern 3, which are consecutively deposited on the substrate 10, wherein the first and second dielectric films and 7 have a common first via hole 4. In FIG. 8A, the order of arrangement as viewed from outside the terminal is such that the edge of the ITO film pattern 3, the edge of the first metallic film pattern 1, and the periphery of the first via hole 4 are consecutively arranged. This structure of the terminal simplifies the fabrication process compared to the structure shown in FIG. 7.
In the above structures of the scanning terminals shown in FIGS. 7A and 7B and FIGS. 8A and 8B, since the periphery of the via hole of the first dielectric film 6 roughly or accurately coincides with the periphery of the via hole of the second dielectric film 7, the level difference formed in the surface of the ITO film pattern 3 is equivalent to the sum of the thicknesses of the first dielectric film 6 and the second dielectric film 7 and thus is relatively large. This causes the amount of dust attached onto the steps formed at the scanning terminals to be large. The dust attached onto the substrate may enter the display area during or after the assembly of the LCD device, thereby degrading the image quality of the LCD device.
For reducing the amount of dust attached onto the surface of the TFT substrate, Patent Publication JP-A-2001-311963 describes a technique wherein the level difference on the surface of the TFT substrate is reduced by providing an equalization film in via holes through which the switching devices are connected to the respective pixel electrodes (FIG. 1 in the publication).
For reducing the amount of dust attached onto the surface of the orientation film, Patent Publication JP-A-1997-43629 describes another technique wherein dummy electrodes are disposed outside the display area to capture therein the fabric dust carried during the rubbing treatment and prevent the fabric dust from entering the display area of the subsequent substrates (FIG. 1 in the publication).
The structure described in JP-A-2001-311963 cannot be applied to the terminal of an LCD device wherein the topmost ITO film pattern is electrically connected to the bottom metallic film pattern, because the described structure uses an organic insulator film between the ITO film pattern and the bottom metallic film pattern for reducing the level difference.
The structure described in JP-A-1997-43629 prevents the dust from attaching onto the display area in the LCD device, and not onto the terminal, although it may reduce the total amount of the dust attached. In addition, the space for the dummy electrodes increases the marginal area of the substrate other than the display area.